1. Field of the Invention
The present invention relates to an image display device and a driving method of the image display device, and is applicable, for example, to an active matrix type image display device formed by an organic EL (Electro Luminescence) element. The present invention makes it possible to set the gate voltage of a driving transistor with high precision even when a plurality of signal lines are driven on a time division basis in an image display device driving a self-luminous element by the driving transistor, by setting at least the potential of a signal line to a precharge voltage in advance.
2. Description of the Related Art
Heretofore, an active matrix type image display device using organic EL elements has a display section formed by arranging pixel circuits including the organic EL elements and driving circuits driving the organic EL elements in the form of a matrix. This type of image display device drives each pixel circuit by a signal line driving circuit and a scanning line driving circuit disposed on the periphery of the display section to display a desired image.
In relation to the image display device using the organic EL elements, Japanese Patent Laid-Open No. 2007-310311 discloses a method of forming one pixel circuit using two transistors. Thus, according to the method disclosed in Japanese Patent Laid-Open No. 2007-310311, the configuration of the image display device can be simplified.
Japanese Patent Laid-Open No. 2007-310311 also discloses a constitution for correcting variation in threshold voltage and variation in mobility of a driving transistor for driving an organic EL element. Thus, according to the constitution disclosed in Japanese Patent Laid-Open No. 2007-310311, degradation in image quality due to variation in threshold voltage and variation in mobility of the driving transistor can be prevented.
In addition, Japanese Patent Laid-Open No. 2007-133284 proposes a constitution in which a process of correcting variation in the threshold voltage is divided and performed a plurality of times.
The image display device using the organic EL elements current-drives the organic EL elements using a driving transistor formed by a TFT (Thin Film Transistor). The TFT has a disadvantage of large variations in characteristics. The image quality of the image display device using the organic EL elements is degraded significantly by variation in threshold voltage, which variation is one of the variations in characteristics of the driving transistor. Incidentally, this degradation in image quality is perceived as stripes, luminance nonuniformity and the like.
More specifically, a driving current Ids made to flow through the organic EL element by the driving transistor is expressed by the following equation. Incidentally, Vgs in the equation denotes the gate-to-source voltage of the driving transistor. Vth denotes the threshold voltage of the driving transistor. μ denotes the mobility of the driving transistor. W denotes the channel width of the driving transistor. L denotes the channel length of the driving transistor. Cox denotes the capacitance of a gate insulating film per unit area of the driving transistor.
                              Ids          =                                    β              2                        ×                                          (                                  Vgs                  -                  Vth                                )                            2                                      ⁢                                  ⁢                  β          =                      μ            ×                          W              L                        ×            Cox                                              (        1        )            
Thus, the current Ids flowing through the organic EL element changes according to variation in the threshold voltage Vth of the driving transistor. As a result, the image display device using the organic EL element has light emission luminance varied in each pixel. When Equation (1) is modified, the following equation can be obtained.
                    Vgs        =                                            (                              Ids                ×                                  2                  β                                            )                                      1              /              2                                +          Vth                                    (        2        )            
Thus, when the organic EL element is driven by a driving current Iref, a gate-to-source voltage Vref can be expressed by the following equation.
                    Vref        =                                            (                              Iref                ×                                  2                  β                                            )                                      1              /              2                                +          Vth                                    (        3        )            
Thus, when a pixel circuit is formed so as to set the gate-to-source voltage Vgs of the driving transistor by a differential voltage Vdata from the voltage Vref, the following relational equation can be obtained. Thus, in this case, effect of the threshold voltage Vth of the driving transistor can be avoided. Thus variation in light emission luminance due to variation in the threshold voltage Vth can be prevented.
                    Ids        =                              β            2                    ×                                    (                              Vdata                -                                                      (                                          Iref                      ×                                              2                        β                                                              )                                                        1                    /                    2                                                              )                        2                                              (        4        )            
Incidentally, the following relational equation can be obtained when Iref=0. It is thus possible to avoid the effect of the threshold voltage Vth of the driving transistor and prevent degradation in image quality also when Iref=0. Incidentally, when Iref=0, a current source of the current Iref does not need to be provided, and thus the constitution can be simplified.
                    Ids        =                              β            2                    ×                      Vdata            2                                              (        5        )            
The constitution disclosed in Japanese Patent Laid-Open No. 2007-310311 corrects variation in the threshold voltage of the driving transistor on the basis of this correcting principle. FIG. 22 is a block diagram showing an image display device to which the method disclosed in Japanese Patent Laid-Open No. 2007-310311 is applied. The image display device 1 has a display section 2 formed on a transparent insulating substrate such as glass or the like. The image display device 1 has a signal line driving circuit 3 and a scanning line driving circuit 4 formed on the periphery of the display section 2.
The display section 2 is formed by arranging pixel circuits 5R, 5G, and 5B for red, green, and blue in the form of a matrix. The signal line driving circuit 3 outputs a driving signal Ssig indicating light emission luminance to signal lines sigR, sigG, and sigB provided to the display section 2. More specifically, the signal line driving circuit 3 sequentially latches image data D1 input in order of raster scanning, for example, distributes the image data D1 to the signal lines sigR, sigG, and sigB, and then subjects each piece of the distributed data to digital-to-analog conversion processing to generate the driving signal Ssig. The image display device 1 sets the gradations of the respective pixel circuits 5R, 5G, and 5B on a so-called line-sequential basis, for example.
The scanning line driving circuit 4 outputs a writing signal WS and a driving signal DS to respective scanning lines VSCAN1 and VSCAN2 provided to the display section 2. The writing signal WS performs on-off control on writing transistors disposed in the pixel circuits 5R, 5G, and 5B. The driving signal DS controls the drain voltage of driving transistors disposed in the pixel circuits 5R, 5G, and 5B. The scanning line driving circuit 4 generates the writing signal WS and the driving signal DS by processing a timing signal output from a timing generator not shown in the figure in scanners 6A and 6B. Incidentally, references R, G, and B will hereinafter be set as appropriate as references of the signal lines sig and the driving signals Ssig of the signal lines sig to indicate correspondence with the pixel circuits 5R, 5G, and 5B for red, green, and blue. In addition, numbers in parentheses and references as references of the signal lines sig and the driving signals Ssig of the signal lines sig, references of the scanning lines VSCAN1 and VSCAN2, and the like indicate order from the side of a raster scanning start end as appropriate.
FIG. 23 is a diagram showing in detail a constitution of a pixel circuit 5R for red. Incidentally, pixel circuits 5G and 5B for green and blue are formed in the same manner as the pixel circuit 5R for red except for the colors of light emission by organic EL elements. Hence, as appropriate, the constitution of only the pixel circuit 5R for red will be described in the following, and repeated description will be omitted.
In the pixel circuit 5R, the cathode of an organic EL element 8 is connected to a predetermined fixed voltage Vss1. In addition, in the pixel circuit 5R, the anode of the organic EL element 8 is connected to the source of a driving transistor Tr3. Incidentally, the driving transistor Tr3 is an N-channel type transistor formed by a TFT, for example. In the pixel circuit 5R, the drain of the driving transistor Tr3 is connected to the scanning line VSCAN2. The pixel circuit 5R thereby current-drives the organic EL element 8 using the driving transistor Tr3 of a source follower circuit configuration.
The pixel circuit 5R has a storage capacitor Cs between the gate and the source of the driving transistor Tr3. The pixel circuit 5R sets the gate side terminal voltage of the storage capacitor Cs to a voltage according to the driving signal Ssig by a writing signal WS. As a result, the pixel circuit 5R current-drives the organic EL element 8 by the driving transistor Tr3 according to a gate-to-source voltage Vgs corresponding to the driving signal Ssig. Incidentally, a capacitance Coled in FIG. 23 is the stray capacitance of the organic EL element 8. Suppose in the following that the capacitance Coled is sufficiently larger than the capacitance of the storage capacitor Cs. In addition, suppose that the parasitic capacitance of the gate node of the driving transistor Tr3 is sufficiently smaller than the capacitance of the storage capacitor Cs.
Specifically, in the pixel circuit 5R, the gate of the driving transistor Tr3 is connected to the signal line sig via a writing transistor Tr1, which performs on-off operation according to the writing signal WS. The signal line driving circuit 3 in this case outputs the driving signal Ssig by selecting a gradation setting voltage Vsig and a voltage Vofs for threshold voltage correction in predetermined timing via switch circuits 9 and 10, which perform on operation according to predetermined control signals SELsig and SELofs, respectively.
Incidentally, the fixed voltage Vofs for threshold voltage correction is a predetermined fixed voltage used to correct variation in the threshold voltage of the driving transistor Tr3. The gradation setting voltage Vsig indicates the light emission luminance of each pixel, and is a result of adding the correcting voltage Vofs to a gradation voltage Vdata. The gradation voltage Vdata is generated by subjecting image data to digital-to-analog conversion processing, and corresponds to the light emission luminance of the pixel circuits 5R, 5G, and 5B connected to the respective signal lines sig.
As indicated by “light emission” in a driving state (FIG. 24G), the pixel circuit 5R sets the writing transistor Tr1 in an off state by the writing signal WS for a period that the organic EL element 8 is made to emit light (which period will hereinafter be referred to as an emission period). The pixel circuit 5R supplies a power supply voltage VDDV2 to the driving transistor Tr3 by a driving signal DS for power supply during the emission period. The pixel circuit 5R thereby makes the organic EL element 8 emit light by a driving current Ids corresponding to the gate-to-source voltage Vgs determined by the gate voltage Vg and the source voltage Vs (FIGS. 24E and 24F) of the driving transistor Tr3, the gate-to-source voltage Vgs being a voltage across the storage capacitor Cs, during the emission period (see Equation (1)).
The pixel circuit 5R lowers the driving signal DS for power supply to a predetermined fixed voltage VSSV2 at time point t0 at which the emission period ends. The fixed voltage VSSV2 in this case is low enough to make the drain of the driving transistor Tr3 function as a source, and is lower than the cathode voltage Vss1 of the organic EL element 8. Thereby, in the pixel circuit 5R, a charge accumulated at the terminal on the organic EL element 8 side of the storage capacitor Cs is discharged to the scanning line VSCAN2 via the driving transistor Tr3. As a result, in the pixel circuit 5R, the source voltage Vs of the driving transistor Tr3 is lowered to the voltage VSSV2, and the light emission of the organic EL element 8 is stopped.
At next predetermined time point ti, the pixel circuit 5R sets the switch circuit 10 on the fixed voltage Vofs side to an on state. As a result, in the pixel circuit SR, the signal line sig is set to the fixed voltage Vofs (FIG. 24C). The pixel circuit 5R thereafter changes the writing transistor Tr1 to an on state by the writing signal WS (FIG. 24A). The pixel circuit 5R thereby sets the gate voltage Vg of the driving transistor Tr3 to the fixed voltage Vofs. Incidentally, the fixed voltage Vofs is a voltage such that the driving transistor Tr3 is not turned on after threshold voltage correction to be described later. Specifically, letting Vtholed be the threshold voltage of the organic EL element 8, the fixed voltage Vofs needs to satisfy the following relational equation.Vofs<VSS1+Vtholed+Vth  (6)
The pixel circuit 5R thereby sets the gate-to-source voltage Vgs of the driving transistor Tr3 to Vofs−VSSV2. The pixel circuit 5R sets the voltage Vofs−VSSV2 larger than the threshold voltage Vth of the driving transistor Tr3 by setting the fixed voltages Vofs and VSSV2.
The pixel circuit 5R thereafter raises the drain voltage of the driving transistor Tr3 to the power supply voltage VDDV2 by the driving signal DS at time point t2 (FIGS. 24A to 24C). Thereby, in the pixel circuit 5R, a charge current flows in from the power supply VDDV2 to the terminal on the organic EL element 8 side of the storage capacitor Cs via the driving transistor Tr3. As a result, in the pixel circuit 5R, the voltage Vs of the terminal on the organic EL element 8 side rises gradually. Incidentally, in this case, because the fixed voltage Vofs is set in the pixel circuit 5R so as to satisfy Equation (6), the current flowing in via the driving transistor Tr3 is used only to charge the capacitance Coled of the organic EL element 8 and the storage capacitor Cs. As a result, in the pixel circuit 5R, only the source voltage Vs of the driving transistor Tr3 rises without the organic EL element 8 emitting light.
In the pixel circuit 5R, when a potential difference across the storage capacitor Cs becomes the threshold voltage Vth of the driving transistor Tr3, the inflow of the current via the driving transistor Tr3 stops. Hence, in this case, the source voltage Vs of the driving transistor Tr3 stops rising when the potential difference across the storage capacitor Cs becomes the threshold voltage Vth of the driving transistor Tr3. Thereby the pixel circuit 5R sets the potential difference across the storage capacitor Cs to the threshold voltage Vth of the driving transistor Tr3.
At time point t3 after the passage of a sufficient time to set the potential difference across the storage capacitor Cs to the threshold voltage Vth of the driving transistor Tr3, the pixel circuit 5R changes the writing transistor Tr1 to an off state by the writing signal WS (FIG. 24A). The pixel circuit 5R thereby sets the potential difference across the storage capacitor Cs to the threshold voltage Vth of the driving transistor Tr3 in a period from time point t2 to time point t3.
The pixel circuit 5R next sets the switch circuit 10 on the fixed voltage Vofs side to an off state, and thereafter sets a switch circuit 9 on the gradation setting voltage Vsig side to an on state (FIGS. 24C and 24D). The pixel circuit 5R thereby sets the voltage of the signal line sig to the gradation setting voltage Vsig. In addition, the pixel circuit 5R sets the writing transistor Tr1 in an on state at next time point t4. Thereby, in the pixel circuit 5R, the gate voltage Vg of the driving transistor Tr3 gradually rises from the state in which the potential difference across the storage capacitor Cs is set at the threshold voltage Vth of the driving transistor Tr3, and the gate voltage Vg of the driving transistor Tr3 is set to the gradation setting voltage Vsig. As a result, as described above with reference to Equation (6), the pixel circuit 5R sets the gate-to-source voltage Vgs of the driving transistor Tr3 to a differential voltage Vdata from a voltage Vref. As a result, the pixel circuit 5R can prevent variation in driving current Ids due to variation in the threshold voltage Vth of the driving transistor Tr3, and thus prevent variation in light emission luminance.
With the drain voltage of the driving transistor Tr3 retained at the power supply voltage VDDV2, the pixel circuit 5R connects the gate of the driving transistor Tr3 to the signal line sig for a fixed period Tμ, and thereby sets the gate voltage of the driving transistor Tr3 to the gradation setting voltage Vsig. Thereby the pixel circuit 5R also corrects variation in mobility μ of the driving transistor Tr3.
A writing time constant required for the rise in the gate voltage Vg of the driving transistor Tr3 which rise is performed via the writing transistor Tr1 is set shorter than a time constant required for a rise in the source voltage Vs of the driving transistor Tr3. Suppose in the following description that the writing time constant is so short as to be negligible as compared with the time constant required for a rise in the source voltage Vs.
In this case, when the writing transistor Tr1 performs on operation, the gate voltage Vg of the driving transistor Tr3 quickly rises to the gradation setting voltage Vsig (Vofs+Vdata). At the time of the rising of the gate voltage Vg, when the capacitance Coled of the organic EL element 8 is sufficiently larger than the capacitance of the storage capacitor Cs, the source voltage Vs of the driving transistor Tr3 does not vary.
However, when the gate-to-source voltage Vgs of the driving transistor Tr3 is increased to be higher than the threshold voltage Vth, a current Ids flows in from the power supply VDDV2 via the driving transistor Tr3, and the source voltage Vs of the driving transistor Tr3 rises gradually. As a result, in the pixel circuit 5R, the voltage across the storage capacitor Cs is discharged by the driving transistor Tr3, and the rising speed of the gate-to-source voltage Vgs is lowered.
A discharge speed at this time changes according to the capability of the driving transistor Tr3. More specifically, the higher the mobility μ of the driving transistor Tr3, the faster the discharge speed. That is, the driving current Ids of the driving transistor Tr3 that determines the discharge speed can be expressed by the following equation.
                              Ids          =                                    β              2                        ×                                          (                                                      1                    Vdata                                    +                                                            β                      2                                        ×                                                                                            T                          μ                                                ⁢                                                                                                                      C                                                                      )                                            -                2                                                    ⁢                                  ⁢                  C          =                      Cs            +            Coled                                              (        7        )            
As a result, in the pixel circuit 5R, the potential difference across the storage capacitor Cs is set so as to be lowered as the mobility μ of the driving transistor Tr3 is increased. Thus variation in light emission luminance due to variation in mobility is prevented. After the passage of the period Tμ, the pixel circuit 5R lowers the writing signal WS, and changes the switch circuit 9 on the gradation setting voltage Vsig side to an off state. As a result, the pixel circuit 5R starts an emission period, and makes the organic EL element 8 emit light by the driving current corresponding to the voltage across the storage capacitor Cs. Incidentally, at this time, the power supply voltage VDDV2 needs to be set such that the driving transistor Tr3 performs saturation operation. More specifically, the power supply voltage VDDV2 needs to be set such that VDDV2>VEL+(Vgs−Vth).
Heretofore, a method has been proposed which reduces the number of output terminals of a data driver, which is an integrated circuit for generating the above-described gradation voltage Vdata, by driving signal lines on a time division basis, with an objective of reducing connecting parts of the data driver in the signal line driving circuit of a liquid crystal image display device.
It is therefore considered that the image display device described with reference to FIG. 23 can also adopt this system to be simplified in constitution. For this, it is considered that the output stage of a signal line driving circuit 13 is formed as shown in FIG. 25. Specifically, in FIG. 25, the signal line driving circuit 13 inputs a fixed voltage Vofs for threshold voltage correction to signal lines sigR, sigG, and sigB via switch circuits 10R, 10G, and 10B, respectively. The signal line driving circuit 13 in this case makes the three switch circuits 10R, 10G, and 10B simultaneously perform on operation by a control signal SELofs. The signal line driving circuit 13 thereby simultaneously sets the potential of the signal lines connected to the pixel circuits 5R, 5G, and 5B to the fixed voltage Vofs. In addition, in synchronism with the setting of the fixed voltage Vofs, the pixel circuits 5R, 5G, and 5B make the writing transistor Tr1 perform on-off operation, and temporarily raise the driving signal DS. The pixel circuits 5R, 5G, and 5B thereby simultaneously set the potential difference across the storage capacitor Cs to the threshold voltage Vth of the driving transistor Tr3 (FIG. 26D).
The signal line driving circuit 13 also inputs the output signal sigin of a data driver 12 to the signal lines sigR, sigG, and sigB of the pixel circuits 5R, 5G, and 5B for red, green, and blue via switch circuits 9R, 9G, and 9B, respectively. As shown in FIG. 26E, the output signal sigin of the data driver 12 is generated by time-division-multiplexing gradation setting voltages Vsig to be output to the three pixel circuits 5R, 5G, and 5B. The signal line driving circuit 13 makes the switch circuits 9R, 9G, and 9B sequentially perform on operation by control signals SELsigR, SELsigG, and SELsigB (FIGS. 26A to 26C). The signal line driving circuit 13 thereby distributes and outputs the output signal sigin to the corresponding signal lines sigR, sigG, and sigB (FIGS. 26F to 26H).
In correspondence with the driving of the signal lines sigR, sigG, and sigB, the pixel circuits 5R, 5G, and 5B sequentially make the writing transistor Tr1 perform on operation to set the gate voltage of the driving transistor Tr3 to the gradation setting voltage Vsig. According to the constitution of FIG. 25, the number of output terminals of the data driver 12 can be reduced to ⅓ of the number of signal lines provided in the display section. Therefore the constitution can be simplified.
However, the image display device of organic EL elements needs to make the writing transistor Tr1 perform on operation and greatly raise the gate voltage Vg of the driving transistor Tr3 from the fixed voltage Vofs to the gradation setting voltage VsigR, VsigG, or VsigB. Incidentally, in FIGS. 26F to 26H, the voltage rises are indicated by a reference ΔVwr. Consequently, in order to set the gate voltage Vg of the driving transistor Tr3 to the gradation setting voltage VsigR, VsigG, or VsigB with high precision, the image display device needs a certain time after making the writing transistor Tr1 perform on operation.
Thus, in the case where the signal line driving circuit 13 of FIG. 25 drives the three signal lines on a time division basis, it is difficult to set the gate voltage Vg of the driving transistor Tr3 to the gradation setting voltage VsigR, VsigG, or VsigB with high precision when the number of lines of the display section is increased due to an increase in precision. Incidentally, when the terminal voltage of the storage capacitor Cs thus cannot be set to the gradation setting voltage VsigR, VsigG, or VsigB with high precision, it becomes difficult to represent a gradation correctly, which causes degradation in image quality.
Even in a case of low resolution, it is similarly difficult to set the gate voltage Vg of the driving transistor Tr3 to the gradation setting voltage VsigR, VsigG, or VsigB with high precision when the number of signal lines driven by time division is increased. Thus, in this case, it is difficult to reduce the number of terminals of the data driver, and it is difficult to simplify the constitution.